Post-quantum crypto, SiP packaging land in edge FPGAs


A new family of FPGAs from Efinix targets constrained edge AI deployments with a combination of power reduction, integrated packaging, high-speed I/O, reliability features, and built-in cryptographic security.

The Titanium Edge devices reduce static power consumption by 50% compared to the previous Titanium generation, which is designed to support always-on inference in thermally limited systems. System-in-Package variants combine FPGA logic, HyperRAM, and SPI boot flash in a single module as small as 5.5 mm × 5.5 mm, reducing PCB footprint by up to 60% versus discrete implementations.

I/O performance reaches 2.5 Gbps with MIPI interfaces supporting x1 through x8 data lane widths, enabling multi-sensor vision and imaging pipelines without external bridge components. A dedicated hardware SEU scrubbing engine continuously monitors and corrects configuration memory against radiation-induced bit flips.

Security variants add post-quantum cryptography aligned with CNSA 2.0, including ML-DSA-65 signature authentication, AES-256-GCM encryption, PUF-based key derivation, secure boot, and full key lifecycle management. The family spans 39,000 to 123,000 logic elements. Ti125 and Ti95 devices are sampling now; Ti70 and Ti40 follow in Q4 2026.


Filed Under: Communications

 



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